Design Verification

VotaryTech has built the verification expertise around the latest methodologies, in particular System Verilog with OVM/UVM. Our teams have been involved in the development of advanced verification methodologies for many tier-1 semiconductor companies, utilizing not only OVM/UVM, but also techniques such as constrained random generation, functional coverage and assertion-based verification.

With our emphasis on both digital and mixed signal designs, VotaryTech has considerable experience with mixed mode simulation methodologies.
We have expertise with simulators, debugging tools, formal verifiers and hardware accelerators from all the major EDA tool suppliers.

LIST of Verified IPs

1) AXI4 slave interface IP
2) AXI4 lite
3) AXI4 slave interface IP
4) AXI4 interconnect IP
5) AXI4 Generic
6) MIPICSI RX
7) MIPICSI TX
8) HDMI MAC
9) HDMI PHY
10) Demosaic
11) Ethernet MAC 10/100 MBPS
12) Ethernet MAC 10/100/1000 MBPS
13) Ethernet MAC 10 GBPS
14) Ethernet Generic PHY
15) DDR4/LPDDR
16) USB 2.0

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